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J-Trace for Cortex-M


JTAG debug probe with trace support for Cortex-M cores


J-Trace CM

J-Trace for Cortex-M is a JTAG debug probe designed for Cortex-M cores which includes trace (ETM) support. J-Trace for Cortex-M can also be used as a J-Link and it also supports ARM7/9 cores. Tracing on ARM7/9 targets is not supported.

Features


  • Has all the J-Link functionality
  • Hi-Speed-USB 2.0 interface
  • JTAG speed: 25 MHz
  • Works with all currently available Cortex-M devices at 100 MHz trace clock
  • Supports tracing on Cortex-M0/M0+/M1/M3/M4 targets
  • Free software updates1, 2 years of support
  • 16 MB trace buffer


Documentation download

1As a legitimate owner of a SEGGER J-Trace, you can always download the latest software free of charge. Though not planned and not likely, we reserve the right to change this policy. Note that older models may not be supported by newer versions of the software. Typically, we support older models with new software at least 3 years after end of life.

Package content


J-Trace Cortex-M is delivered with the following components:
  • J-Trace Cortex-M
  • 19-pin, 0.05" target trace cable
  • 20-pin, 0.1" target ribbon cable
  • USB cable

19-pin JTAG/SWD and Trace connector


J-Trace provides a JTAG/SWD+Trace connector. This connector is a 19-pin connector. It connects to the target via an 1-1 cable. The following table lists the J-Link / J-Trace SWD pinout.

Pin Signal Type Description
1 VTref Input This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators and to control the output logic levels to the target. It is normally fed from Vdd of the target board and must not have a series resistor.
2 SWDIO/ TMS I/O / output JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS of the target CPU.
4 SWCLK/TCK Output JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state of the target board. Typically connected to TCK of the target CPU.
6 SWO / TDO Input JTAG data output from target CPU. Typically connected to TDO of the target CPU.
--- --- --- This pin (normally pin 7) is not existent on the 19-pin JTAG/SWD and Trace connector.
8 TDI Output JTAG data input of target CPU.- It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI of the target CPU.
9 NC NC Not connected inside J-Link. Leave open on target hardware.
10 nRESET I/O Target CPU reset signal. Typically connected to the RESET pin of the target CPU, which is typically called "nRST", "nRESET" or "RESET".
11 5V-Supply Output This pin can be used to supply power to the target hardware. For more information about how to enable/disable the power supply, please refer to Target power supply on page 142.
12 TRACECLK Input Input trace clock. Trace clock = 1/2 CPU clock.
13 5V-Supply Output This pin can be used to supply power to the target hardware. For more information about how to enable/disable the power supply, please refer to Target power supply on page 142.
14 TRACEDATA[0] Input Input Trace data pin 0.
16 TRACEDATA[1] Input Input Trace data pin 1.
18 TRACEDATA[2] Input Input Trace data pin 2.
20 TRACEDATA[3] Input Input Trace data pin 3.

Specifications


Detailed specifications of J-Trace Cortex-M can be found here.